Adders learning suite

Adders is a series of learner tasks designed to aid the teaching and learning of Half Adder and Full Adder logic circuits.

Half and Full Adders spreadsheet

In this macro-powered spreadsheet, learners undertake the following tasks:

Complete the Sum and Carry Out columns of Half and Full Adder Truth Tables.
Complete Sum and Carry Out Karnaugh Maps for Half and Full Adders.
Complete Boolean expressions for Sum and Carry Out circuits for Half and Full Adders.

Clicking the ‘Mark Section’ button shows the learner the progress they have made in that section. Making changes then hides the marking until the ‘Mark Section’ button is clicked again.

NOTE: for this spreadsheet to work correctly, the copy of Excel in which it is running must allow macros to execute, and ‘Enable Content’ must be clicked when the spreadsheet is opened.

Build a Half Adder

This PowerPoint slide contains components for the learner to replicate in order to design a Half Adder circuit. A Half Adder Truth Table is provided for reference. A second PowerPoint slide with the solution is provided for Directing Staff.

Build a Full Adder

This PowerPoint slide contains components for the learner to replicate in order to design a Full Adder circuit. A Full Adder Truth Table is provided for reference. A second PowerPoint slide with the solution is provided for Directing Staff.

Adding Circuit Challenge

This PowerPoint slide contains components for the learner to replicate in order to design a circuit to add two four-bit binary numbers using Half Adders, Full Adders and NAND Flip Flops. A link to the simulator.io website is provided so that learners may then build working models of their designs. A second PowerPoint slide with the design solution and a link to a working model on the simulator.io website is provided for Directing Staff.