OCR GCSE Computer Science (J277) – Topic 1.1 Systems Architecture Cheat Sheet

Support your students with this visually engaging and easy-to-follow OCR GCSE Computer Science Topic 1.1 Systems Architecture Cheat Sheet. Designed specifically for the OCR J277 specification, this resource provides a concise summary of the key knowledge students need for exams, revision, retrieval practice, and independent study.

The resource presents complex concepts in a clear, accessible format using diagrams, tables, revision notes, and quick-check questions to reinforce learning and improve retention.

Topics Covered

1. Architecture of the CPU
   Control Unit (CU)
   Arithmetic Logic Unit (ALU)
   Registers
   Cache Memory

2. Key CPU Registers
   Program Counter (PC)
   Memory Address Register (MAR)
   Memory Data Register (MDR)
   Accumulator (ACC)

3. Fetch-Decode-Execute Cycle
   Fetch stage
   Decode stage
   Execute stage
   Instruction processing overview

4. Von Neumann Architecture
   Stored-program concept
   Memory and instruction storage
   Input, process and output model

5. CPU Performance Factors
   Clock speed
   Cache size
   Number of cores
   Exam-focused explanations

6. Embedded Systems
   Definition and characteristics
   Real-world examples
   Dedicated functions and applications

7.Quick Knowledge Check
Retrieval questions for self-assessment
Ideal for revision and homework activities

Perfect For
OCR GCSE Computer Science (J277)
Years 10-11
Revision sessions
Retrieval practice
Knowledge organisers
Homework support
Intervention groups
Exam preparation